Embedded and Reconfigurable Systems
COSMIAC’s Research Scientist, Dr. Jim Aarestad, directs the Center’s Embedded and Reconfigurable systems Laboratory. The Laboratory research activities focus on FPGA-based systems for aerospace and fault tolerant applications. The Laboratory expertise expands to several hardware description languages (Verilog, VHDL, SystemVerilog), as well as multiple device manufacturers (Altera, Xilinx, Microsemi, etc). The Laboratory performs their research with four high-performance workstations and software licenses for complete design suites including Xilinx licenses for their dynamic partial reconfiguration (PR) and triple modular redundancy (TMR) tools. PR is the ability to dynamically modify blocks of logic by downloading partial bit files while the remaining logic continues to operate without interruption. Xilinx Partial Reconfiguration technology allows designers to change functionality on the fly, eliminating the need to fully reconfigure and re-establish links, dramatically enhancing the flexibility that FPGAs offer. The Xilinx TMR technology was developed to address the enhanced reliability requirements of FPGAs operating in extreme radiation environments. Designed for space applications, and proven through numerous mission-critical projects, TMR provides full immunity to single-event upset (SEU) and single-event transient (SET) failures for FPGA designs based upon space-grade Xilinx Virtex-4® designs. Having access to these specialized software tools provides the Laboratory with the ability to perform cutting-edge research and product development.
The Laboratory has prior experience developing several projects, including the recently-completed OpenASIM project. OpenASIM is an embedded system based on the OR1200 processor, and acts as an interface between a spacecraft’s command and data handler (C&DH) and its sensor payloads in accordance with the Air Force Research Laboratory’s Modular Open Architecture (MONARCH) approach. The design is available (to U.S. citizens) as open source under LGPL license.
Currently, the Laboratory is developing a C&DH component for the RHEME mission. This component consists of an FPGA with a soft-core microprocessor that provides communication between itself, the experiment payloads, and the International Space Station.